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Atmel AT34C02C
3.
4.
Memory organization
Atmel AT34C02C, 2K Serial EEPROM: The 2K is internally organized with 16 pages of 16 bytes each. Random word
addressing requires a 8-bit data word address.
Device operation
CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device. Data on the SDA pin may
change only during SCL low time periods (see Figure 4-3 on page 6 ). Data changes during SCL high periods will indicate
a start or stop condition as defined below.
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which must precede any
other command (see Figure 4-4 on page 6 ).
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the stop
command will place the EEPROM in a standby power mode (see Figure 4-4 on page 6 ).
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The
EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle.
STANDBY MODE: The Atmel AT34C02C features a low-power standby mode which is enabled:
? Upon power-up or
? After the receipt of the STOP bit and the completion of any internal operations
MEMORY RESET: After an interruption in protocol, power loss or system reset, any Two-wire part can be reset by
following these steps:
? Clock up to nine cycles
? Look for SDA high in each cycle while SCL is high and then
? Create a start condition.
Figure 4-1.
Bus timing SCL: Serial clock SDA: Serial data I/O
5
5185E–SEEPR–3/11
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